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April 2022: CAEML receives Phase II award from the NSF

The mission of CAEML is to enable fast, accurate design and verification of microelectronic circuits and systems by creating machine learning algorithms to derive models used for electronic design automation (EDA), resulting in a reduced design cycle time and radically improved design reliability.

Machine Learning for
Hardware Design and Optimization
WORKSHOP

 San Jose
  August 1, 2022

AEML will host a workshop on Machine Learning for Hardware Design and Optimization on Monday, August 1, 2022 from 1-4pm in San Jose, California. Employees of current and prospective member companies are invited to register to attend.

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HOSTED BY:

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